TRIPLE-1, Inc. announces AI processor "GOKU" for deep learning that uses world's cutting-edge 5-nanometer process

TRIPLE-1, Inc. announces AI processor "GOKU" for deep learning that uses world's cutting-edge 5-nanometer process

Press Release (Asianet)

AsiaNet 82789

FUKUOKA, Japan, Feb. 7, 2020 (Antara/Kyodo JBN-AsiaNet) --

TRIPLE-1, Inc. (henceforth "TRIPLE-1"), based in Fukuoka, southwestern Japan, has announced the development of the AI processor "GOKU" for deep learning that uses the world's cutting-edge 5-nanometer process.

Logo: https://kyodonewsprwire.jp/prwfile/release/M105925/202002056475/_prw_PI1im_ZR3VAL3t.png

- Overview

"GOKU" is an AI processor for deep learning that uses the world-leading 5-nm process born from the development of the TSMC 7-nm process "KAMIKAZE." It utilizes core know-how such as design ability, optimization of power consumption, and yield improvement in cutting-edge processes cultivated in the "KAMIKAZE" project started in February 2017.

In addition, with the cooperation of research institutes (related to AI core architecture), TRIPLE-1's elite engineers, who have been involved in ASIC development for over 20 years, design the circuit. The first-stage prototype has been completed, and the company is inspecting its performance. Seeking to realize mass production in 2021, it will complete the prototype closer to a mass-produced product within 2020. It will be sold to equipment and device manufacturers for data servers or deep-learning centers around the world, and TRIPLE-1 has already begun to discuss commercial deals with multiple companies.

Photo:
https://kyodonewsprwire.jp/prwfile/release/M105925/202002056475/_prw_PI2lg_aL0m486W.jpg
 (*Image of expected completion for illustration purposes. It may differ from the actual product.)

- Development background

In recent years, various companies have entered the AI chip market, including not only giant IT companies but also fast-growing start-ups in China. As competition for edge AI chip development intensifies, oligopoly supply by several major companies continues in the deep-learning AI processor market. Currently there are no mass-produced chips smaller than a 12-nm process.

On the other hand, the electrical consumption of data centers is expected to exceed 10% of the entire world's electrical energy by 2030. TRIPLE-1 believes that AI processors for deep learning need not only high "computing power" to learn and process a huge amount of data, but also a severe viewpoint on "power consumption" from the perspective of energy conservation and cost reduction.

Therefore, TRIPLE-1 has launched the project to develop "GOKU," a deep-learning AI processor dedicated to ultra-low power consumption, using the world's highly advanced 5-nm process and utilizing its unique low-power / high-performance technology and design know-how in the cutting-edge process.

- "GOKU," an AI processor for deep learning with the world-leading 5-nm process

Feature: Using the world's leading advanced 5-nm process, it has 10 times higher power efficiency than the conventional process

TRIPLE-1's goal is to reduce power consumption to 1/10 of the equivalent performance compared to conventional products (process: 12 nm), and its feature is low-voltage operation that is inconceivable with existing products.

- Process: 5 nm
- Power consumption: 100 W
- Peak performance (half-precision): 1 PFLOPS (1,000 TFLOPS)
- Electrical efficiency (half-precision): 10 TFLOPS / W

Feature: Design to connect multiple calculation units

Like the structure of the human brain, where synapses connect neurons in a complex manner, a great amount of communication as well as very complex inter-core communication is important for deep-learning AI processors.

Utilizing the unique circuit design technology of "GOKU," which arranges many small arithmetic units on one large die as much as possible, it is designed to secure the communication (interconnect) band between the arithmetic units as much as possible. It has been designed to get closer to the human brain.

Feature: Partially analog-designed to optimize multiplier performance

The highly power-consuming multiplier circuit was analog-designed. By designing analog (hand placement and hand wiring) instead of digital (automatic placement and wiring), it can be carefully designed by hand and designed to minimize power consumption.

- Challenge to 5 nm. Unique yield improvement technology used in cutting-edge process

As the process shrinks, the yield issue becomes more complex. The main determinants of yield in conventional processes were stuck-at faults and characteristic variations between lots. However, in the highly advanced process, characteristic differences between chips generated from a single wafer and variations within a single chip have become a major issue. This has become a serious problem directly linked to the manufacturing cost in mass production, and it has been common sense that addressing this problem depends on the improvement of the manufacturing technology of the foundry (contract chip-manufacturing company) responsible for semiconductor production.

Considering this situation, TRIPLE-1 has succeeded in commercializing a unique circuit design technology that reduces the effects of characteristic variations in the highly advanced process and improves the effective yield. By doing so, the company can not only pursue high performance but also produce cost-competitive products, and its products will be used all over the world.

TRIPLE-1 outline
Company name: TRIPLE-1, Inc.
Representative: Representative Director CEO Takuya Yamaguchi
Corporate headquarters:
7F IT Bldg.2, 1-14-20 Hakataeki-Higashi, Hakata-ku Fukuoka-shi, Fukuoka Pref., Japan
Capital: 3,662,895,398 yen (including the capital reserve)
URL: https://triple-1.com/en/

Source: TRIPLE-1, Inc.

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